As one type of nonvolatile memory devices, there is a type called a MONOS (Metal Oxide Nitride Oxide Semiconductor) type or SONOS (Silicon Oxide Nitride Oxide Silicon) type in which a gate insulating layer between a channel region and a control gate is made of a laminated body of a silicon oxide layer/a silicon nitride layer/a silicon oxide layer and the silicon nitride layer traps electric charges.
As the MONOS type nonvolatile memory device, a device shown in FIG. 21 is known (Y. Hayashi, et al, 2000 Symposium on VLSI Technology Digest of Technical Papers, p.122-p. 123).
In a memory cell 100 of the MONOS type, a word gate 14 is formed on a semiconductor substrate 10 with a first gate insulating layer 12 interposed therebetween. On both sides of the word gate 14, a side wall-like first control gate 20 and second control gate 30 are disposed, respectively. Between a bottom portion of the first control gate 20 and the semiconductor substrate 10, there is disposed a second gate insulating layer 22, and between a side surface of the first control gate 20 and the word gate 14, there is an insulating layer 24. Similarly, between a bottom portion of the second control gate 30 and the semiconductor substrate 10, there is a second gate insulating layer 22, and between a side surface of the second control gate 30 and the word gate 14, there is an insulating layer 24. In addition, between the control gate 20 and the control gate 30, of adjacent memory cells (no interposed word gate 14), in the semiconductor substrate 10, an impurity layer 16 or 18 that constitutes a source region or a drain region is formed.
Thus, one memory cell 100 has two MONOS type memory elements on the side surfaces of the word gate 14. Furthermore, these two MONOS type memory elements can be independently controlled. Accordingly, one memory cell 100 can memorize 2-bit information.